TSMC details next-gen CoWoS roadmap: over 14-reticle packages and a 48x leap in compute power expected by 2029 — massive size enables 24 HBM5E stacks and a further boost in memory bandwidth

TSMC updated its CoWoS roadmap, pointing to much larger AI packages by 2029, beyond 14 reticles.

Future system-in-package designs could support up to 24 HBM5E stacks and around 20 compute chiplets by 2028.

TSMC expects roughly 48x more compute transistors than a 2024 dual-chiplet N7-based design, plus 34x higher memory bandwidth.

The roadmap underscores advanced packaging as a key scaling path for AI and HPC, with major implications for power, cooling, substrates, and server design.